Forbes

Don't Get Left Behind With An Outdated Design Cycle

If you're trying to get ahead of competitors with the same product design cycle you've always used, I have bad news for you: You're probably falling behind. No matter how far along you are in ...
Semiconductor Engineering

Easy-To-Use Reliability Checks Throughout The Design Cycle From IP To Full-Chip Tapeout

With the increasing complexity of design layouts and shorter tapeout cycles, waiting until signoff verification is no longer practical for design teams. There is a constant push to shift targeted ...
EDN

Virtual hardware reduces IoT design cycle

Arm Virtual Hardware delivers accurate models of Arm-based SoCs for developers to build and test software without physical silicon. The cloud-based offering is a key component of Arm’s Total Solutions ...
Nasdaq

ASE launches its Integrated Design EcosystemTM to enable silicon package design efficiencies that reduce cycle time by half

SUNNYVALE, Calif.--(BUSINESS WIRE)-- Advanced Semiconductor Engineering, Inc. (ASE), a member of ASE Technology Holding Co., Ltd. (NYSE: ASX, TAIEX: 3711), today announced the launch of its Integrated ...
Digi Times

Musk plans to cut AI chip design cycle to 9 months

Tesla CEO Elon Musk posted on X that the AI5 chip design is "almost done and AI6 is in early stages," with AI7, AI8, and AI9 "aiming for a 9-month design cycle." Musk stated that the AI5 chip achieves ...
Electronic Design

Physically Aware Network-on-Chip Streamlines SoC Design Cycle

This video is part of TechXchange Talks. Arteris IP has released FlexNoC 5, a network-on-chip (NoC) IP configuration tool, designed to improve system-on-chip (SoC) designs and streamline the design ...